1. Field of the Invention
The present invention relates to solid state semiconductor devices. More particularly, the present invention relates to semiconductor devices formed on integrated circuit chips.
2. Description of the Prior Art and Related Information
Integrated circuit chips are employed in a wide variety of applications. In many of such applications, the integrated circuit chip is placed within an environment not under strict manufacturing control. For example, in a variety of add-on products for use with personal computers and other computer products, systems for providing communication links between computers, and various other electronic systems based in business or similar settings, integrated circuit components are installed in a manner which cannot be carefully controlled by the integrated circuit manufacturer. Similarly, in a wide variety of other applications, integrated circuits are incorporated in systems where precise control over the electronic environment is not possible. In such applications, such integrated circuits may frequently come in contact with sources of voltage or current for which the active semiconductor devices on the chip were not designed.
One such source of undesired high voltages and currents is electrostatic discharge, which typically originates in an electrostatic discharge from a machine or human involved in the assembly or installation process. Considerable effort has gone into designing integrated circuit chips having some ability to resist such potentially damaging electrostatic discharge pulses.
Due to the aforementioned wide variety of end use applications for integrated circuit chips, however, another very dangerous source of high voltages and currents is DC power supplies in the applications environment. More specifically, power supplies, connector cables, high voltage supply rails and various other power sources may often be inadvertently placed in contact with an integrated circuit. For example, integrated circuit pin out S may be connected to a cable which runs close to and in parallel with a power supply cable, in a specific application. Although the voltage level from these sources will typically be much less than from an electrostatic discharge, nonetheless it will often be much higher than the on-board integrated circuit voltage. Since such DC sources provide a continuous current supply rather than a very brief pulse as in an electrostatic discharge event, circuitry designed to protect against electrostatic discharge events will in general not be effective to prevent against damage from such continuous DC sources. For example, a typical electrostatic discharge protection circuit design with a parallel discharge current path to circuit ground will not save an integrated circuit chip from destruction from accidental connection to such a DC source. Rather, the DC power source will continue to flow with high current through the short to the integrated circuit chip ground until the chip is destroyed by overheating, or the DC source is drained or shorted out. In either case, a typical consequence will be shutting down of the entire system of which the integrated circuit chip forms a part, as well as loss of the chip itself.
These considerations are further aggravated by the increasing sensitivity of modern VLSI chips due to the dense packing and small device geometries employed therein. Such modern densely packed VLSI chips are much more subject to breakdown at one or more of the active devices on the chip, in response to coupling to a higher voltage than the on-board chip voltage, due to the crowding together of junctions potentially subject to breakdown conduction Additionally, such modern VLSI chips are much more likely to be destroyed by sustained exposure to a DC current since a sensitive portion of the circuit is more likely to be in the current path. Since the trend is to ever smaller device geometries, and hence lower breakdown voltages for the active devices employed therein, the tendency to failure of integrated circuit chips configured adjacent DC power sources will be further increased.
Accordingly, a need presently exists for an improved integrated circuit design allowing resistance to damage caused by coupling to DC power sources. A need further exists for an active semiconductor device capable of withstanding relatively high DC voltages.